1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device for forming a III-V nitride semiconductor layer on the surface of a silicon carbide substrate and forming via holes which penetrate both, and more particularly, to a method of manufacturing a semiconductor device capable of miniaturizing elements formed on the surface side in particular and speeding up via hole work.
2. Background Art
High-frequency transistors and MMIC (Microwave Monolithic Integrated Circuit) using compound semiconductor are used (e.g., see Japanese Patent Laid-Open No. 2001-77128). The characteristics of these semiconductor devices are significantly influenced by a via hole forming process.
A conventional via hole forming process will be explained. First, a III-V nitride semiconductor layer is formed on the surface of a silicon carbide substrate and elements on the surface are formed. Next, the surface side of a wafer is pasted to a support substrate of sapphire or the like and the thickness of the wafer is reduced through grinding. The silicon carbide substrate and the III-V nitride semiconductor layer are then dry-etched from the back side and via holes penetrating both are thereby formed at once.
However, according to the conventional method, when the diameter of a via hole is reduced to miniaturize elements formed on the surface side, the aspect ratio (ratio of the diameter of an etched part to the depth of etching) increases. Since silicon carbide is a member hard to be etched and the etching rate when worked through dry etching is low, a large aspect ratio requires a long time for via hole work. On the other hand, when the diameter of the via hole is increased to reduce the aspect ratio, the elements formed on the surface side cannot help but be increased in size.